Title :
A 58-to-60.4GHz Frequency Synthesizer in 90nm CMOS
Author :
Lee, Chihun ; Liu, Shen-luan
Author_Institution :
Nat. Taiwan Univ., Taipei
Abstract :
A 58-60.4GHz frequency synthesizer is implemented in a 90nm CMOS process. A VCO with a distributed-LC tank and a current-reuse frequency divider are used. For 60.4GHz, the measured phase noise at 1 MHz and 2MHz offset is -85.1dBc/Hz and -95dBc/Hz, respectively. Including the buffers, the chip consumes 80mW from a 1.2V supply.
Keywords :
CMOS integrated circuits; frequency dividers; frequency synthesizers; phase noise; 1 MHz; 1.2 V; 2 MHz; 58 to 60.4 GHz; 80 mW; 90 nm; CMOS process; VCO; current-reuse frequency divider; distributed-LC tank; frequency synthesizer; CMOS technology; Clocks; Filters; Frequency synthesizers; Inductors; Phase noise; Transceivers; Tuning; Varactors; Voltage-controlled oscillators;
Conference_Titel :
Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0853-9
Electronic_ISBN :
0193-6530
DOI :
10.1109/ISSCC.2007.373361
