• DocumentCode
    2868417
  • Title

    An efficient parallel transparent BIST method for multiple embedded memory buffers

  • Author

    Huang, D.C. ; Jone, W.B. ; Das, S.R.

  • Author_Institution
    Dept. of Comput. Sci., Nat. Chung-Cheng Univ., Taiwan
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    379
  • Lastpage
    384
  • Abstract
    In this paper, we propose a new transparent built-in self-test (TBIST) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent test interface is designed to perform testing in the normal mode and to cope with nested interrupts in a realtime manner. The circular scan test interface facilitates the processes of both test pattern generation and signature analysis. By tolerating redundant read/write/shift operations, we develop a new march algorithm called TRSMarch to achieve the goals of low hardware overhead, short test time, and high fault coverage
  • Keywords
    VLSI; automatic test pattern generation; buffer storage; built-in self test; fault diagnosis; logic testing; TBIST; TRSMarch; circular scan test interface; fault coverage; hardware overhead; march algorithm; multiple embedded memory buffers; nested interrupts; parallel transparent BIST method; redundant read/write/shift operations; signature analysis; test pattern generation; test time; transparent test interface; Automatic testing; Built-in self-test; Fault detection; Hardware; Pattern analysis; Performance evaluation; Random access memory; Read-write memory; System testing; Test pattern generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 2001. Fourteenth International Conference on
  • Conference_Location
    Bangalore
  • ISSN
    1063-9667
  • Print_ISBN
    0-7695-0831-6
  • Type

    conf

  • DOI
    10.1109/ICVD.2001.902688
  • Filename
    902688