DocumentCode :
2868742
Title :
An on-chip coupling capacitance measurement technique
Author :
Nair, Pratheep A. ; Gupta, Anubhav ; Desai, Madhav P.
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol., Bombay, India
fYear :
2001
fDate :
2001
Firstpage :
495
Lastpage :
499
Abstract :
We describe a technique for the accurate measurement of on-chip coupling capacitance using a Charge Based Coupling Capacitance Measurement (CBCCM) Technique. Detailed circuit simulations show that this method can measure sub-femtofarad coupling capacitance values, and can be used to isolate and measure components of device capacitance as well
Keywords :
VLSI; capacitance measurement; circuit simulation; integrated circuit interconnections; integrated circuit measurement; IC interconnects; IC measurement; VLSI; capacitance measurement technique; charge based technique; circuit simulations; device capacitance; on-chip coupling capacitance; sub-femtofarad coupling capacitance; Capacitance measurement; Charge measurement; Coupling circuits; Current measurement; Distributed control; Electric variables measurement; Integrated circuit interconnections; Signal generators; Variable structure systems; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2001. Fourteenth International Conference on
Conference_Location :
Bangalore
ISSN :
1063-9667
Print_ISBN :
0-7695-0831-6
Type :
conf
DOI :
10.1109/ICVD.2001.902707
Filename :
902707
Link To Document :
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