• DocumentCode
    2868749
  • Title

    Spectral algorithm to compute and synthesize reduced order passive models for arbitrary RC multiports

  • Author

    Batterywala, Shabbir H. ; Narayanan, H.

  • Author_Institution
    Silicon Autom. Syst. Ltd., Bangalore, India
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    500
  • Lastpage
    509
  • Abstract
    In this article, we present a time domain method to compute synthesized reduced-order approximation of arbitrary linear RC multiports. If the given multiport is passive, then the computed approximation, with all its nodes accessible, is also proved to be passive. This ensures that the reduced order multiport is well behaved during circuit simulations when embedded back in the parent nonlinear circuit. The reduced-order multiport is synthesized as a passive RC circuit which can be analyzed directly with standard circuit simulators treating the latter as black boxes. The method is based on computing tests from the partial fraction expansion of the port admittance matrix. The computations are performed by writing state equations implicitly, wherein the Lanczos algorithm is used to compute eigenvalues and eigenvectors. The residue matrices are also computed implicitly. The notion of `relevance´ of an eigenvalue for reduced order model is emphasized. The method does not impose any topological constraints (such as prohibition of capacitor cutsets) on the multiport. All computations are performed implicitly through DC analyses of appropriately constructed networks. An efficient DC analysis algorithm is used for this. The implicit computation ideas presented in this paper could also be used for efficient spectral investigation of linear RC/RLC circuits
  • Keywords
    RC circuits; circuit simulation; eigenvalues and eigenfunctions; multiport networks; nonlinear network analysis; passive networks; time-domain analysis; DC analyses; Lanczos algorithm; arbitrary RC multiports; eigenvalues; eigenvectors; nonlinear circuit; partial fraction expansion; passive RC circuit; port admittance matrix; reduced order passive models; residue matrices; standard circuit simulators; state equations; time domain method; topological constraints; Admittance; Analytical models; Circuit simulation; Circuit synthesis; Circuit testing; Computational modeling; Eigenvalues and eigenfunctions; Linear approximation; Nonlinear circuits; RLC circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 2001. Fourteenth International Conference on
  • Conference_Location
    Bangalore
  • ISSN
    1063-9667
  • Print_ISBN
    0-7695-0831-6
  • Type

    conf

  • DOI
    10.1109/ICVD.2001.902708
  • Filename
    902708