Title :
A 52.4mW 3D Graphics Processor with 141Mvertices/s Vertex Shader and 3 Power Domains of Dynamic Voltage and Frequency Scaling
Author :
Nam, Byeong-Gyu ; Lee, Jeabin ; Kim, Kwanho ; Lee, Seung Jin ; Yoo, Hoi-Jun
Author_Institution :
KAIST, Daejeon
Abstract :
A 3D graphics processor fabricated using 0.18mum 6M CMOS contains 1.57M transistors and 29kB SRAM in a core size of 17.2mm2. The vertex shader utilizes a logarithmic number system for 141 Mvertices/s and the 3 power domains are controlled separately by dynamic voltage and frequency scaling for 52.4mW at 60fps.
Keywords :
CMOS integrated circuits; SRAM chips; computer graphic equipment; microprocessor chips; 29 kByte; 3D graphics processor; 52.4 mW; CMOS technology; SRAM chips; dynamic frequency scaling; dynamic voltage scaling; vertex shader; Dynamic voltage scaling; Energy consumption; Frequency; Graphics; Handheld computers; Layout; Pipelines; Reduced instruction set computing; Throughput; Virtual colonoscopy;
Conference_Titel :
Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0853-9
Electronic_ISBN :
0193-6530
DOI :
10.1109/ISSCC.2007.373402
