Title :
DESIGN FOR TESTABILITY USING SCANPATH TECHNIQUES FOR PATH-DELAY TEST AND MEASUREMENT
Author :
Dervisoglu, Bulent I. ; Stong, Gayvin E.
Keywords :
Circuit faults; Circuit testing; Clocks; Design for testability; Digital integrated circuits; Electrical fault detection; Flip-flops; Frequency; Integrated circuit measurements; Integrated circuit testing;
Conference_Titel :
Test Conference, 1991, Proceedings., International
Print_ISBN :
0-8186-9156-5
DOI :
10.1109/TEST.1991.519696
