DocumentCode
2869349
Title
A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time
Author
Schinkel, Daniel ; Mensink, Eisse ; Klumperink, Eric ; Van Tuijl, Ed ; Nauta, Bram
Author_Institution
Twente Univ., Enschede
fYear
2007
fDate
11-15 Feb. 2007
Firstpage
314
Lastpage
605
Abstract
A latch-type voltage sense amplifier in 90nm CMOS is designed with a separated input and cross-coupled stage. This separation enables fast operation over a wide common-mode and supply voltage range. With a 1-sigma offset of 8mV, the circuit consumes 92fJ/decision with a 1.2V supply. It has an input equivalent noise of 1.5mV and requires 18ps setup-plus-hold time
Keywords
CMOS analogue integrated circuits; amplifiers; flip-flops; 1.2 V; 18 ps; 90 nm; CMOS; cross-coupled stage; double-tail latch-type voltage sense amplifier; CMOS technology; Circuit topology; Delay effects; Flip-flops; Noise measurement; Tail; Timing; Transceivers; Virtual colonoscopy; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
1-4244-0853-9
Electronic_ISBN
0193-6530
Type
conf
DOI
10.1109/ISSCC.2007.373420
Filename
4242391
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