DocumentCode :
2869360
Title :
Hierarchical Test Program Development for Scan Testable Circuits
Author :
Leenstra, Jens ; Spaanenburg, Lambert
fYear :
1991
fDate :
26-30 Oct 1991
Firstpage :
375
Keywords :
Assembly; Automatic testing; Circuit faults; Circuit testing; Design for testability; Integrated circuit testing; Microelectronics; Sequential analysis; Shift registers; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1991, Proceedings., International
ISSN :
1089-3539
Print_ISBN :
0-8186-9156-5
Type :
conf
DOI :
10.1109/TEST.1991.519697
Filename :
519697
Link To Document :
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