DocumentCode :
2869674
Title :
A 200MHz PLL CMOS LSI with DSA E/D NMOS prescaler
Author :
Uno, Toru ; Saeki, Tomonori ; Nabeta, Y. ; Fukui, Kazuhiro ; Nezu, T.
Author_Institution :
Matsushita Electronics Corp., Kawasaki, Japan
Volume :
XXIII
fYear :
1980
fDate :
13-15 Feb. 1980
Firstpage :
216
Lastpage :
217
Abstract :
A 200MHz single-chip PLL using a DSA E/D NMOS-compatihie N-well CMOS concept will be presented. Approach is best suited to 4b microprocessors simplifying development of digital frequency synthesizers for tuning systems.
Keywords :
Counting circuits; Frequency synthesizers; Inverters; Large scale integration; MOS devices; MOSFETs; Phase locked loops; Power dissipation; Receivers; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1980 IEEE International
Conference_Location :
San Francisco, CA, USA
Type :
conf
DOI :
10.1109/ISSCC.1980.1156071
Filename :
1156071
Link To Document :
بازگشت