DocumentCode
2870120
Title
A Gb MOS logic circuit with buried channel MOSFETs
Author
Nishiuchi, K. ; Shibayama, H. ; Nakamura, T. ; Hisatsugu, T. ; Ishikawa, Hiroshi ; Fukukawa, Y.
Author_Institution
Fujitsu Labs., Ltd., Kawasaki, Japan
Volume
XXIII
fYear
1980
fDate
13-15 Feb. 1980
Firstpage
60
Lastpage
61
Abstract
A buried-channel MOS frequency divider using 1μm design and fabricated by dry processes with electron-beam made masks will be reported. Gb frequency division and sub 100ps switching delay have been obtained.
Keywords
Circuit optimization; Delay; Frequency conversion; Gallium arsenide; Laboratories; Logic circuits; Logic devices; MOSFETs; Ring oscillators; Switching circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1980 IEEE International
Conference_Location
San Francisco, CA, USA
Type
conf
DOI
10.1109/ISSCC.1980.1156097
Filename
1156097
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