Title :
Optimized implementation of real-time image processing algorithms on field programmable gate arrays
Author :
Dias, Ailton F. ; Lavarenne, Christophe ; Akil, Mohamed ; Sorel, Yves
Author_Institution :
Groupe ESIEE, Lab. LPSI, Noisy-le-Grand, France
Abstract :
We present the algorithm architecture “adequation” methodology for the optimized implementation of real-time image processing algorithms on field programmable gate arrays. This methodology is based on a single factorized graphs model, used from the algorithm specification down to the architecture implementation, through optimizations expressed in terms of defactorization transformations. A simple image processing example is presented to illustrate the methodology
Keywords :
field programmable gate arrays; graph theory; hardware description languages; image processing equipment; optimisation; parallel architectures; VHDL library; algorithm architecture adequation; defactorization transformations; field programmable gate arrays; multi-FPGA target architectures; optimized implementation; real-time image processing algorithms; single factorized graphs model; Algorithm design and analysis; Computer architecture; Delay; Design optimization; Field programmable gate arrays; Hardware; Image processing; Integrated circuit interconnections; Optimization methods; Registers;
Conference_Titel :
Signal Processing Proceedings, 1998. ICSP '98. 1998 Fourth International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7803-4325-5
DOI :
10.1109/ICOSP.1998.770803
