DocumentCode :
2870289
Title :
A 75-GHz PLL in 90-nm CMOS Technology
Author :
Lee, Jri
Author_Institution :
National Taiwan Univ., Taipei
fYear :
2007
fDate :
11-15 Feb. 2007
Firstpage :
432
Lastpage :
613
Abstract :
The design and experimental verification of a 75GHz PLL implemented in a 90nm CMOS process are presented. The circuit incorporates a three-quarter wavelength oscillator and a PFD based on SSB mixers and achieves an operation range of 320MHz and reference sidebands of less than -72dBc while consuming 88mW from a 1.45V supply
Keywords :
CMOS integrated circuits; millimetre wave integrated circuits; millimetre wave mixers; millimetre wave oscillators; phase detectors; phase locked loops; 1.45 V; 320 MHz; 75 GHz; 88 mW; 90 nm; CMOS; frequency detector; phase detector; phase locked loops; single sideband mixers; three-quarter wavelength oscillator; Amplitude modulation; CMOS technology; Filters; Frequency conversion; Inductors; Mixers; Phase detection; Phase frequency detector; Phase locked loops; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
1-4244-0853-9
Electronic_ISBN :
0193-6530
Type :
conf
DOI :
10.1109/ISSCC.2007.373479
Filename :
4242450
Link To Document :
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