• DocumentCode
    2870484
  • Title

    A 10b 205MS/s 1mm2 90nm CMOS Pipeline ADC for Flat-Panel Display Applications

  • Author

    Lee, Seung-Chul ; Jeon, Young-Deuk ; Kim, Kwi-Dong ; Kwon, Jong-Kee ; Kim, Jongdae ; Moon, Jeong-Woong ; Lee, Wooyol

  • Author_Institution
    Electron. & Telecommun. Res. Inst., Daejeon
  • fYear
    2007
  • fDate
    11-15 Feb. 2007
  • Firstpage
    458
  • Lastpage
    615
  • Abstract
    A 10b 205MS/S 1mm2 ADC for flat-panel display applications is implemented in a 90nm CMOS process. The ADC with an LDO regulator achieves a 53dB PSRR for a 100MHz noise tone and a 55.2dB SNDR for a 30MHz 1Vpp single-ended input at 205MS/S. The core ADC power consumption is 40mW from a 1V non-regulated supply.
  • Keywords
    CMOS digital integrated circuits; analogue-digital conversion; flat panel displays; 1 V; 10 bit; 100 MHz; 30 MHz; 40 mW; 90 nm; CMOS process; LDO regulator; flat-panel display applications; pipeline analog-to-digital converter; Circuit topology; Displays; Energy consumption; Frequency; Linearity; Pipelines; Regulators; Switches; Switching circuits; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    1-4244-0853-9
  • Electronic_ISBN
    0193-6530
  • Type

    conf

  • DOI
    10.1109/ISSCC.2007.373492
  • Filename
    4242463
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2870484