DocumentCode
2870569
Title
A Cryogenic ADC operating Down to 4.2K
Author
Creten, Ybe ; Merken, Patrick ; Sansen, Willy ; Mertens, Robert ; Van Hoof, Chris
Author_Institution
IMEC, Leuven
fYear
2007
fDate
11-15 Feb. 2007
Firstpage
468
Lastpage
616
Abstract
A SAR ADC is designed to operate from room temperature down to 4.2K, as needed by cryogenic sensor systems. The ADC is robust to cryogenic temperature-induced transistor anomalies. It has an INL of -0.8 (0.5)LSB and DNL of 1.1 (0.4)LSB at 4.2K(300K). It draws 70muA for a 200pF output capacitor at 3kHz sampling rate and 5V supply
Keywords
analogue-digital conversion; cryogenic electronics; 200 pF; 3 kHz; 4.2 K; 5 V; 70 muA; SAR ADC; cryogenic analog-to-digital converter; cryogenic sensor systems; cryogenic temperature-induced transistor anomalies; CMOS process; CMOS technology; Circuits; Cooling; Cryogenics; Energy consumption; Hysteresis; MOSFETs; Temperature; Transconductance;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
1-4244-0853-9
Electronic_ISBN
0193-6530
Type
conf
DOI
10.1109/ISSCC.2007.373497
Filename
4242468
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