DocumentCode :
2871084
Title :
40Gb/s High-Gain Distributed Amplifiers with Cascaded Gain Stages in 0.18μm CMOS
Author :
Chien, Jun-Chau ; Lu, Liang-Hung
Author_Institution :
National Taiwan Univ., Taipei
fYear :
2007
fDate :
11-15 Feb. 2007
Firstpage :
538
Lastpage :
620
Abstract :
High-gain distributed amplifiers (DA) using cascaded stages as distributed cells are implemented in 0.18mum CMOS technology. Two DAs with 3times3 and 2times4 configurations are demonstrated for 40Gb/s applications. While consuming 250mW from a 2.8V supply, a GBW of up to 394GHz is achieved.
Keywords :
CMOS analogue integrated circuits; distributed amplifiers; 0.18 micron; 2.8 V; 250 mW; 40 Gbits/s; CMOS technology; cascaded gain stages; distributed cells; high-gain distributed amplifiers; Bandwidth; CMOS technology; Circuits; Coplanar waveguides; Distributed amplifiers; Frequency; Impedance; Inductors; Power amplifiers; Power transmission lines;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
1-4244-0853-9
Electronic_ISBN :
0193-6530
Type :
conf
DOI :
10.1109/ISSCC.2007.373532
Filename :
4242503
Link To Document :
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