DocumentCode
2871222
Title
NMOS comparator for a bubble memory
Author
McCreary, J. ; Hunt, J.
Author_Institution
Intel Corp., Santa Clara, CA, USA
Volume
XXIV
fYear
1981
fDate
18-20 Feb. 1981
Firstpage
184
Lastpage
185
Abstract
An NMOS comparator designed for a bubble memory peripheral support chip will be reported. Circuit compares the difference between two successive differential input signals against a 2.5mV threshold voltage. A 40μV offset voltage with a 0.1μV/°C drift has been measured.
Keywords
Capacitors; Circuits; Clamps; Logic; MOS devices; Nonvolatile memory; Switches; Temperature distribution; Threshold voltage; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1981 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1981.1156164
Filename
1156164
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