ALLOCATION AND ASSIGNMENT IN HIGH-LEVEL SYNTHESIS FOR SELF-TESTABLE DATA PATHS

Author

Avra, Lanae

fYear

1991

fDate

26-30 Oct 1991

Firstpage

463

Keywords

Automatic testing; Built-in self-test; Costs; Flow graphs; Hardware; High level synthesis; Logic design; Packaging; Pattern analysis; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1991, Proceedings., International

ISSN

1089-3539

Print_ISBN

0-8186-9156-5

Type

DOI

10.1109/TEST.1991.519708

Filename

519708

Link To Document