Exponentially Tapering Ground Wires for Elmore Delay Reduction in On Chip Interconnects

In this paper inter metal capacitors of ground wires are considered, for the first time in Elmore delay calculations of clock distribution interconnect networks. Analytical models for capacitance calculation of inter metal wires which are exponentially tapered are presented. In addition, the tapering of the ground wire for reducing this delay is proposed. The results show that by a exponentially tapering of the ground wires in the clock distribution networks , a 17% reduction in the Elmore delay of interconnects is achieved in compare with not tapering ground wires.