Title :
A 2500-gate bipolar macro cell array with 250ps gate delay
Author :
Shi-Chuan Lee ; Bass, A.
Author_Institution :
Motorola Incorporated, Mesa, AZ, USA
Abstract :
A subnanosecond 2500-gate masterslice ECL LSI with on-chip diagnostic circuitry using oxide-isolated walled-emitter structures and three-layer metalization will be discussed. A gate delay time of 250ps has been achieved with a 1mA current switch.
Keywords :
Clocks; Delay; Detectors; Integrated circuit interconnections; Latches; Logic; Pins; Pulse generation; Switches; Wiring;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1982 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1982.1156282
