DocumentCode
2873366
Title
ATPG for Reversible Circuits Using Simulation, Boolean Satisfiability, and Pseudo Boolean Optimization
Author
Wille, Robert ; Zhang, Hongyan ; Drechsler, Rolf
Author_Institution
Inst. of Comput. Sci., Univ. of Bremen, Bremen, Germany
fYear
2011
fDate
4-6 July 2011
Firstpage
120
Lastpage
125
Abstract
Research in the domain of reversible circuits found significant interest in the last years - not least because of the promising applications e.g. in quantum computation and low-power design. First physical realizations are already available, motivating the development of efficient testing methods for this kind of circuits. In this paper, complementary approaches for automatic test pattern generation for reversible circuits are introduced and evaluated. Besides a simulation-based technique, methods based on Boolean satisfiability and pseudo-Boolean optimization are thereby applied. Experiments on large reversible circuits show the suitability of the proposed approaches with respect to different application scenarios and test goals, respectively.
Keywords
CMOS integrated circuits; automatic test pattern generation; computability; electronic engineering computing; optimisation; ATPG; Boolean satisfiability; CMOS-based reversible circuit; automatic test pattern generation; low-power design; pseudoBoolean optimization; quantum computation; simulation-based technique; Circuit faults; Computational modeling; Controllability; Integrated circuit modeling; Logic gates; Test pattern generators; ATPG; Boolean satisfiability; pseudo Boolean optimization; reversible circuits; test;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI (ISVLSI), 2011 IEEE Computer Society Annual Symposium on
Conference_Location
Chennai
ISSN
2159-3469
Print_ISBN
978-1-4577-0803-9
Electronic_ISBN
2159-3469
Type
conf
DOI
10.1109/ISVLSI.2011.77
Filename
5992492
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