DocumentCode
2873609
Title
Design of a VLIW compute accelerator on the Transmogrifier-2
Author
Zhang, L. Louis ; Wang, Qiang ; Lewis, David M.
Author_Institution
Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
fYear
2000
fDate
2000
Firstpage
3
Lastpage
12
Abstract
Design of FCCMs is an expensive and time consuming process, requiring a specialized software and hardware design for each application. A new class of architecture and compiler for customized computers called PECompiler that can automatically generate both hardware and software for field-programmable compute accelerators was recently introduced. This paper presents the parameterized compute accelerator and example applications that have been compiled for it. A generic very long instruction word (VLIW) instruction set is defined for the proposed compute accelerator architecture. Hardware accelerators are designed and implemented for two application programs on the TM-2 based system. It is demonstrated that for these two application programs, the hardware accelerators can provide significant performance improvement over a general-purpose CPU
Keywords
circuit layout CAD; computer architecture; field programmable gate arrays; hardware-software codesign; instruction sets; program compilers; special purpose computers; FCCM; PECompiler; Transmogrifier-2; VLIW compute accelerator; architecture; compiler; compute accelerator architecture; customized computer; field-programmable compute accelerators; hardware accelerators; instruction set; very long instruction word; Acceleration; Buffer storage; Communication system control; Computer architecture; Hardware; Logic devices; Multiprocessor interconnection networks; VLIW; Workstations; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Custom Computing Machines, 2000 IEEE Symposium on
Conference_Location
Napa Valley, CA
Print_ISBN
0-7695-0871-5
Type
conf
DOI
10.1109/FPGA.2000.903387
Filename
903387
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