Title :
A Design of Experiment Based Approach to Variance Optimal Design of CMOS OpAmp
Author :
Khawas, Arnab ; Mukhopadhyay, Siddhartha
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol., Kharagpur, India
Abstract :
The effects of random variations in the fabrication process have increased significantly with the scaling of technology. This leads to parametric failure of IC performances causing a significant loss of yield. In this work, we propose a statistical design flow to minimize the performance parameter variance due to process and mismatch effects by choosing optimized transistor dimensions. Stochastic MOSFET (SMOS) models are used for statistical simulation of circuits to capture the effects of process variation and mismatch in terms of performance parameter variations. Design of a two-stage OpAmp, in 0.18μm technology, has been used as a case-study in this work.
Keywords :
CMOS analogue integrated circuits; MOSFET; operational amplifiers; statistical analysis; CMOS OpAmp; SMOS models; fabrication process; size 0.18 mum; statistical design flow; stochastic MOSFET models; variance optimal design; CMOS integrated circuits; Integrated circuit modeling; Optimization; Performance evaluation; Programming; Response surface methodology; Transistors; Geometric Programming; Mismatch; Process Variation; Response Surface Method; Variance Optimal Design;
Conference_Titel :
VLSI (ISVLSI), 2011 IEEE Computer Society Annual Symposium on
Conference_Location :
Chennai
Print_ISBN :
978-1-4577-0803-9
Electronic_ISBN :
2159-3469
DOI :
10.1109/ISVLSI.2011.11
