DocumentCode
2873706
Title
On the Potentials of FinFETs for Asynchronous Circuit Design
Author
Jafari, Fataneh ; Mosaffa, Mahdi ; Mohammad, Siamak
Author_Institution
Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran
fYear
2011
fDate
4-6 July 2011
Firstpage
331
Lastpage
332
Abstract
Double-gate Fin FETs have proved to be an appropriate substitute for bulk CMOS when technology scales beyond 32nm. We have designed four novel Finest-based asynchronous basic elements, static C-elements, which differ in front gate and back gate connections. They were compared to a traditional C-element with bulk transistors and a low power version of bulk C-element with the use of sleep. To evaluate our C-gates, a dual rail Muller pipeline has been designed with each kind and compared to two versions of bulk MOSFETs Muller pipeline.
Keywords
MOSFET; asynchronous circuits; integrated circuit design; FinFET-based asynchronous basic C-element; asynchronous circuit design; back gate connection; bulk CMOS technology; bulk MOSFET Muller pipeline; bulk transistor; double-gate FinFET; dual rail Muller pipeline; front gate connection; low power bulk C-element; CMOS integrated circuits; CMOS technology; FinFETs; Logic gates; Pipelines; C-element; FinFET; Low power; asynchronous; leakage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI (ISVLSI), 2011 IEEE Computer Society Annual Symposium on
Conference_Location
Chennai
ISSN
2159-3469
Print_ISBN
978-1-4577-0803-9
Electronic_ISBN
2159-3469
Type
conf
DOI
10.1109/ISVLSI.2011.34
Filename
5992512
Link To Document