DocumentCode
2873752
Title
Preprocessing-Based Run-Time Mapping of Applications on NoC-based MPSoCs
Author
Kaushik, Samarth ; Singh, Amit Kumar ; Srikanthan, Thambipillai
Author_Institution
Centre for High Performance Embedded Syst., Nanyang Technol. Univ., Singapore, Singapore
fYear
2011
fDate
4-6 July 2011
Firstpage
337
Lastpage
338
Abstract
Design-time strategies are suited only for mapping predefined set of applications and thus cannot predict dynamic behavior. This dynamism demands run-time mapping of application tasks to maintain a critical balance between performance and resource optimization. This paper proposes a run-time heuristic that intelligently distributes the application tasks among multiple processors taking communication overhead, computation load and resource utilization in consideration.
Keywords
microprocessor chips; network-on-chip; system-on-chip; NoC-based MPSoC; preprocessing-based run-time mapping; resource optimization; Energy consumption; Joining processes; Load modeling; Merging; Program processors; Resource management; System-on-a-chip; Mapping Algorithms; Multiprocessor System-on-Chip (MPSoC); Network-on-Chip (NoC);
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI (ISVLSI), 2011 IEEE Computer Society Annual Symposium on
Conference_Location
Chennai
ISSN
2159-3469
Print_ISBN
978-1-4577-0803-9
Electronic_ISBN
2159-3469
Type
conf
DOI
10.1109/ISVLSI.2011.43
Filename
5992515
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