DocumentCode
2874141
Title
Intelligent On/Off Link Management for On-chip Networks
Author
Savva, Andreas G. ; Theocharides, Theocharis ; Soteriou, Vassos
Author_Institution
Univ. of Cyprus, Nicosia, Cyprus
fYear
2011
fDate
4-6 July 2011
Firstpage
343
Lastpage
344
Abstract
Links connecting on-chip components are a major source of power consumption in modern-day on-chip interconnects. Several efforts have henceforth focused on reducing the power consumption, the majority of which efforts target selected links for turning on and off. In this paper we propose an intelligent power management policy for networks-on-chip where links are turned off and switched back on based on a neural network, which processes link utilization as feedback from the system and determines which links are candidates for turning off and back on. The neural network is kept relatively small in terms of area and power consumption, as it is used to forecast the optimal utilization threshold for which underutilized links are turned off.
Keywords
electronic engineering computing; network-on-chip; neural nets; intelligent on-off link management; modern-day on-chip interconnects; network-on-chip; neural network; power consumption; Artificial neural networks; Hardware; Heuristic algorithms; Power demand; System-on-a-chip; Topology; Turning; Networks on Chip; Neural Network; On - off links; Power Consumption;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI (ISVLSI), 2011 IEEE Computer Society Annual Symposium on
Conference_Location
Chennai
ISSN
2159-3469
Print_ISBN
978-1-4577-0803-9
Electronic_ISBN
2159-3469
Type
conf
DOI
10.1109/ISVLSI.2011.13
Filename
5992537
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