Title :
A HI-CMOSII 8K × 8b static RAM
Author :
Minato, O. ; Masuhara, T. ; Sasaki, T. ; Sakai, Yoshiki ; Hayashida, T. ; Nagasawa, Keisuke ; Nishimura, Kosuke ; Yasui, T. ; Miyauchi, T.
Author_Institution :
Hitachi Central Research Laboratory, Tokyo, Japan
Abstract :
A fully-static 8K×8b RAM using HICMOSII technology with a typical address access time of 65ns and power dissipation of 200mW will be discussed. To improve manufacturing yield a laser redundancy technique utilizing a N+ -i-N+ polysilicon structure was employed.
Keywords :
Circuits; Decoding; Fault tolerance; Laboratories; MOSFETs; Optical pulses; Production engineering; Read-write memory; Switches; Voltage;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1982 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1982.1156345
