• DocumentCode
    2874324
  • Title

    Study and Analysis of Power Optimization Techniques for Embedded Systems

  • Author

    Indumathi, G. ; Ramakrishnan, K.V.

  • Author_Institution
    Dept. of Electron. & Commun., CMR Inst. of Technol., Bangalore, India
  • fYear
    2011
  • fDate
    4-6 July 2011
  • Firstpage
    365
  • Lastpage
    366
  • Abstract
    Various Optimization techniques for reducing power consumption is studied and analyzed as presented in the thesis. As part of the experimental work a power management controller is designed which controls and monitors the power consumption of the peripherals. DFS, Clock gating and power down mode are illustrated with results.
  • Keywords
    electronic engineering computing; embedded systems; optimisation; DFS; embedded systems; power consumption reduction; power management controller; power optimization techniques; Clocks; Embedded systems; Microcontrollers; Noise; Noise reduction; Optimization; Power demand; DFS; DPM; DVS; FSM; PMP/PMC; SOC;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI (ISVLSI), 2011 IEEE Computer Society Annual Symposium on
  • Conference_Location
    Chennai
  • ISSN
    2159-3469
  • Print_ISBN
    978-1-4577-0803-9
  • Electronic_ISBN
    2159-3469
  • Type

    conf

  • DOI
    10.1109/ISVLSI.2011.53
  • Filename
    5992548
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2874324