DocumentCode
2874456
Title
Design of C++ class library and bit-serial compiler for variable-precision datapath synthesis on adaptive computing systems
Author
Suzuki, Katsuharu ; Wang, Michael X. ; Zhao, Fang ; Dai, Wayne W M
Author_Institution
Dept. of Comput. Eng., California Univ., Santa Cruz, CA, USA
fYear
2000
fDate
2000
Firstpage
339
Lastpage
340
Abstract
This paper describes C++ class library and bit-serial datapath synthesis algorithm designed to support variable-precision computation on reconfigurable hardware in adaptive computing systems (ACSs). The enhanced synthesis system compiles C++ design entries into smaller datapath circuits with the shorter latencies compared to the fixed-precision bit-serial circuits
Keywords
C++ language; field programmable gate arrays; program compilers; reconfigurable architectures; software libraries; C++ class library; C++ design entries; adaptive computing systems; bit-serial compiler; bit-serial datapath synthesis algorithm; fixed-precision bit-serial circuits; latencies; reconfigurable hardware; variable-precision computation; variable-precision datapath synthesis; Adaptive systems; Algorithm design and analysis; Application software; Circuit synthesis; Data engineering; Delay; Field programmable gate arrays; Hardware; Pipelines; Software libraries;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Custom Computing Machines, 2000 IEEE Symposium on
Conference_Location
Napa Valley, CA
Print_ISBN
0-7695-0871-5
Type
conf
DOI
10.1109/FPGA.2000.903444
Filename
903444
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