DocumentCode
2874581
Title
A NMOS 64K static RAM
Author
Ebel, A. ; Atwood, Greg ; So, Eddy ; Liu, Siyuan ; Kynett, V. ; Jecmen, R. ; Mingo, J. ; Haiping Dun
Author_Institution
Intel Corp., Santa Clara, CA, USA
Volume
XXV
fYear
1982
fDate
10-12 Feb. 1982
Firstpage
254
Lastpage
255
Abstract
A 50ns 8K×8 static RAM developed with a double-poly/ scaled NMOS technology will be reported. The RAM memory cell is 0.5 mil2resulting in a 64K die size of 54756 mil2.
Keywords
Circuits; Decoding; MOS devices; Packaging; Pins; Power dissipation; Random access memory; Read-write memory; Redundancy; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1982 IEEE International
Conference_Location
San Francisco, CA, USA
Type
conf
DOI
10.1109/ISSCC.1982.1156360
Filename
1156360
Link To Document