DocumentCode
2874661
Title
A high-density PLA macro and its layout generator
Author
Fung, Benjamin C. M. ; Macnee, T. ; Ruglia, G.
Author_Institution
IBM Corp., Essex Junction, VT, USA
Volume
XXV
fYear
1982
fDate
10-12 Feb. 1982
Firstpage
58
Lastpage
59
Abstract
This report will cover a variable-size programmable logic array (PLA) macro and associated layout generator. Fabricated with an N-channel silicon gate technology and 2μm design rules, the PLA implements combinational logic for a design system that wires together macros to produce VLSI chips.
Keywords
Assembly; Circuit optimization; Cities and towns; Clocks; Design automation; Libraries; Logic arrays; Logic design; Programmable logic arrays; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1982 IEEE International
Conference_Location
San Francisco, CA, USA
Type
conf
DOI
10.1109/ISSCC.1982.1156365
Filename
1156365
Link To Document