DocumentCode :
2874726
Title :
A LSI time switch for digital telephone switching
Author :
Nikaido, Tadanobu ; Miyahara, Norio ; Tawara, Kanji ; Aoyama, Keizo ; Noguchi, Eiji
Author_Institution :
NTT Musashino Electrical Communication Laboratory, Tokyo, Japan
Volume :
XXV
fYear :
1982
fDate :
10-12 Feb. 1982
Firstpage :
214
Lastpage :
215
Abstract :
AN LSI TIME SWITCH for the digital telephone switching system,which includes an 11K static RAM and 600 gates of peripheral circuits, affording performance of greater than 20MHz maximum operating frequency and 600mW power consumption, will be described. The LSI was designed for the time switch memory in the speech path of the digital telephone switching system. The low power characteristic of the LSI has made it possible to cool the system without a fan. In using general-purpose ICs, about 50 ICs are needed and the power consumption may exceed 8W to achieve the required performance. This time switch LSI realizes an equivalent lattice size of 1024 x 1024 on a single chip, quadmple of the conventional time switch LSI.
Keywords :
Communication switching; Energy consumption; Frequency; Large scale integration; Random access memory; Read-write memory; Switches; Switching circuits; Switching systems; Telephony;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1982 IEEE International
Conference_Location :
San Francisco, CA, USA
Type :
conf
DOI :
10.1109/ISSCC.1982.1156368
Filename :
1156368
Link To Document :
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