DocumentCode
2875844
Title
A battery backup 64K CMOS RAM with double level aluminum technology
Author
Watanabe, Toshio ; Hayashi, Mariko ; Sasaki, Innan ; Akatsuka, Y. ; Tsujide, T. ; Yamamoto, Hiroshi ; Osamu Kudoh ; Takahashi, Satoshi ; Hara, Tenshi
Author_Institution
Nippon Electric Co., Ltd., Kawasaki, Japan
Volume
XXVI
fYear
1983
fDate
23-25 Feb. 1983
Firstpage
60
Lastpage
61
Abstract
A 10mW 64K CMOS RAM with auto data retention mode will be described. The RAM was fabricated with a double-level aluminum process technology. To reduce active power, a split power control technique was employed. The address access time is 80ns.
Keywords
Aluminum; Batteries; CMOS memory circuits; CMOS technology; Decoding; Detectors; Power dissipation; Power supplies; Random access memory; Read-write memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1983 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1983.1156429
Filename
1156429
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