A Method and FPGA Architecture for Real-Time Polymorphic Reconfiguration

Current FPGA architectures are limited in the area of granular reconfiguration. This is largely due to the limited use of reconfigurable designs and the focus on reconfiguring entire modules as opposed to fine details of a design. The ability to reconfigure a circuits´ characteristics can have huge rewards in the areas of circuit survivability, fault tolerance and anti tamper. This paper addresses this need as well as a proposed dynamically reconfigurable FPGA implementing custom retiming algorithms combined with dynamic signature generation. Through the use of this design, users can significantly increase their level of control of an FPGA design in an effort to address the problems of anti-tamper, circuit survivability and fault tolerance.