Alternative UBM for Lead Free Solder Bumping using C4NP

Author

Ruhmer, Klaus ; Laine, Eric ; Donnell, Kathy O. ; Kostetsky, John ; Hauck, Karin ; Manessis, Dionysios ; Ostmann, Andreas ; Toepper, Michael ; Juergensen, Nils

Author_Institution

Waterbury Center, Waterbury

fYear

2007

fDate

May 29 2007-June 1 2007

Firstpage

15

Lastpage

21

Abstract

This paper analyzes two alternative under bump metallurgy (UBM) structures: sputtered TiW/Ni and electroless Ni/immersion Au (ENIG), with and without Pd. Wafers were fabricated with these UBM structures, solder applied with C4NP, and chip level stressing performed to determine the robustness of these alternative stack-ups. Microelectronic packaging continues the migration from wire bond to flip chip first level interconnect (FLI) to meet aggressive requirements for improved electrical performance, reduced size and weight. Analysis of these structures following multiple reflows and thermal cycling is presented.

Keywords

chip scale packaging; flip-chip devices; integrated circuit interconnections; nickel alloys; solders; titanium alloys; tungsten alloys; wafer level packaging; C4NP technology; TiW-Ni; alternative under bump metallurgy structure; chip level stressing; controlled collapse chip connection new process; electrical performance; electroless Ni-immersion Au UBM structure; flip chip first level interconnect; lead free solder bumping; microelectronic packaging; palladium; sputtered TiW-Ni UBM structure; thermal cycling; wafers fabrication; wire bond; Environmentally friendly manufacturing techniques; Flip chip; Gold; Lead; Microelectronics; Packaging; Performance analysis; Robustness; Wafer bonding; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components and Technology Conference, 2007. ECTC '07. Proceedings. 57th

Conference_Location

Reno, NV

ISSN

0569-5503

Print_ISBN

1-4244-0985-3

Electronic_ISBN

0569-5503

Type

conf

DOI

10.1109/ECTC.2007.373770

Filename

4249856