Title :
Reconfiguration performance analysis of a dynamic optically reconfigurable gate array architecture
Author :
Seto, Daisaku ; Watanabe, Minoru
Author_Institution :
Shizuoka Univ., Shizuoka
Abstract :
To increase gate density, a dynamic optically re-configurable gate array (DORGA) architecture has been proposed that uses the junction capacitance of photodiodes as dynamic memory, thereby obviating the static configuration memory. However, to date, estimation of a perfect optically reconfigurable architecture for DORGA-VLSIs has never been presented. This paper presents a perfect DORGA architecture including a holographic memory. The performances of the DORGA architecture, in particular the reconfiguration context retention time, were analyzed experimentally. The advantages of this architecture are discussed in relation to the results of this study.
Keywords :
VLSI; field programmable gate arrays; holographic storage; optical arrays; optical logic; photodiodes; reconfigurable architectures; DORGA-VLSI; dynamic optically reconfigurable gate array architecture; holographic memory; junction capacitance; photodiodes; reconfiguration performance analysis; static configuration memory; Capacitance; Circuits; Field programmable gate arrays; High speed optical techniques; Holographic optical components; Holography; Optical arrays; Performance analysis; Photodiodes; Very large scale integration;
Conference_Titel :
Field-Programmable Technology, 2007. ICFPT 2007. International Conference on
Conference_Location :
Kitakyushu
Print_ISBN :
978-1-4244-1472-7
Electronic_ISBN :
978-1-4244-1472-7
DOI :
10.1109/FPT.2007.4439262
