DocumentCode :
2877060
Title :
Low power reconfigurable DCT design based on sharing multiplication
Author :
Park, Jongsun ; Kwon, Soonkeon ; Roy, Kaushik
Author_Institution :
School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907, USA
Volume :
3
fYear :
2002
fDate :
13-17 May 2002
Abstract :
We present a low-power reconfigurable OCT architecture, which is based on computation sharing multiplier (CSHM). CSHM specifically targets computation re-use in vector-scalar products and is effectively used in our OCT implementation. A low power reconfigurable OCT architecture is exploited by making a trade off between image quality and power consumption. The proposed OCT architecture was implemented using 0.35µ technology. The experimental results show that reconfigurable OCT using CSHM can improve power consumption by 40 % without noticeable image quality degradation.
Keywords :
Algorithm design and analysis; Delay; Discrete cosine transforms; Educational institutions; Signal processing algorithms; Standards;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing (ICASSP), 2002 IEEE International Conference on
Conference_Location :
Orlando, FL, USA
ISSN :
1520-6149
Print_ISBN :
0-7803-7402-9
Type :
conf
DOI :
10.1109/ICASSP.2002.5745309
Filename :
5745309
Link To Document :
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