• DocumentCode
    2877224
  • Title

    A sub 100ns 256K DRAM

  • Author

    Moench, J. ; Lewandowski, Andreas ; Morton, B. ; Miller, Florent ; Yeargain, B.

  • Author_Institution
    Motorola Semiconductor, Austin, TX, USA
  • Volume
    XXVI
  • fYear
    1983
  • fDate
    23-25 Feb. 1983
  • Firstpage
    230
  • Lastpage
    231
  • Abstract
    A 90ns access time 256K×1 RAM with a 15ns 4b nibble mode will be described. Device uses shared sense amplifiers, booted word lines, active restore and vertical process scaling to achieve improved alpha immunity.
  • Keywords
    Circuit topology; Content addressable storage; Random access memory; Silicides;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1983 IEEE International
  • Conference_Location
    New York, NY, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1983.1156513
  • Filename
    1156513
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2877224