• DocumentCode
    2877483
  • Title

    Application of Wright Etch in failure analysis on localized abnormal implant profile in wafer fabrication

  • Author

    Lee, W.F. ; Chin, Aaron ; Seah, P.H.

  • Author_Institution
    Syst. on Silicon Manuf. Co. Pte. Ltd., Singapore, Singapore
  • fYear
    2011
  • fDate
    4-7 July 2011
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this paper, four low yield cases related to implantation issues in semiconductor wafer fabrication process on Si CMOS device were presented. Wright Etch method was shown to be effective in localizing non-uniform implantation and detecting abnormal implant profile in the Si active area. The etch depth profile and surface morphology after Wright Etch were used primarily to determine any abnormality in the implantation. This method has been demonstrated useful for top view planar inspection using scanning electron microscope (SEM).
  • Keywords
    CMOS integrated circuits; elemental semiconductors; etching; failure analysis; scanning electron microscopy; silicon; surface morphology; CMOS device; SEM; Si; Wright etching; etch depth profile; failure analysis; localized abnormal implant profile; nonuniform implantation; scanning electron microscopy; surface morphology; top view planar inspection; wafer fabrication; Contacts; Implants; Inspection; Morphology; Silicon; Surface morphology; Surface treatment;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Physical and Failure Analysis of Integrated Circuits (IPFA), 2011 18th IEEE International Symposium on the
  • Conference_Location
    Incheon
  • ISSN
    1946-1542
  • Print_ISBN
    978-1-4577-0159-7
  • Electronic_ISBN
    1946-1542
  • Type

    conf

  • DOI
    10.1109/IPFA.2011.5992757
  • Filename
    5992757