A compact three-stage low-voltage low-power BiCMOS operational amplifier with inverted nested Miller compensation

Author

Mayaleh, S. ; Bayindir, N. Suha

Author_Institution

Dept. of Electr. & Electron., Eastern Mediterranean Univ., Mersin, Turkey

Volume

2

fYear

1998

fDate

18-20 May 1998

Firstpage

1265

Abstract

This paper presents a three-stage, compact and power-efficient 3 V BiCMOS operational amplifier (opamp) with rail-to-rail input and output stages. The opamp is designed to be loaded by a 20 pF capacitive load and the unity-gain bandwidth is 5.2 MHz at 62° phase margin. The bipolar output stage is designed to swing an output load current of -12 to 12 mA. The opamp has an open-loop voltage gain of 122 dB and a bandwidth-to-supply power ratio of 6.42 MHz/mW for the 20 pF capacitive load

Keywords

BiCMOS integrated circuits; load (electric); operational amplifiers; -12 to 12 mA; 20 pF; 3 V; 5.2 MHz; bandwidth-to-supply power ratio; bipolar output stage; capacitive load; compact three-stage LV low-power BiCMOS operational amplifier; inverted nested Miller compensation; opamp; open-loop voltage; output load current swing; rail-to-rail input stage; rail-to-rail output stage; unity-gain bandwidth; Bandwidth; BiCMOS integrated circuits; CMOS technology; Low voltage; Operational amplifiers; Power amplifiers; Rail to rail amplifiers; Rail to rail inputs; Signal to noise ratio; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrotechnical Conference, 1998. MELECON 98., 9th Mediterranean

Conference_Location

Tel-Aviv

Print_ISBN

0-7803-3879-0

Type

conf

DOI

10.1109/MELCON.1998.699439

Filename

699439