DocumentCode :
2878162
Title :
A 5ns 4K × 1 NMOS static RAM
Author :
O´Connor, K. ; Kushner, R.
Author_Institution :
AT&T Bell Labs, Allentown, PA, USA
Volume :
XXVI
fYear :
1983
fDate :
23-25 Feb. 1983
Firstpage :
104
Lastpage :
105
Abstract :
A 5ns 400mW 4K×1 NMOS static RAM with a 120μ2six-transistor depletion mode load cell will be described. The device uses boot-strapped word drivers, per column buffers and 0.5 to 0.8μm channel lengths, formed with single level Ta Si/n+ polysilicon.
Keywords :
Capacitors; Clamps; Decoding; Driver circuits; Inverters; Lithography; MOS devices; Propagation delay; Pulsed power supplies; Variable structure systems;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1983 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1983.1156564
Filename :
1156564
Link To Document :
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