DocumentCode
2878193
Title
Facsimile shading corrector
Author
Togashi, M. ; Sato, S. ; Ohshima, S. ; Aruga, K. ; Nakamura, T.
Author_Institution
Matsushita Graphic Communication Systems, Inc., Tokyo, Japan
Volume
XXVII
fYear
1984
fDate
22-24 Feb. 1984
Firstpage
204
Lastpage
205
Abstract
This paper will cover a 5.7mm × 5.73mm chip with 9000 transistors using 3μm CMOS technology and a dissipation of 200mW. The processor incorporates an on-chip 6b parallel ADC and achieves 3% correction accuracy at a 1MHz conversion rate.
Keywords
Analog-digital conversion; Circuits; Clocks; Facsimile; Graphics; Image sensors; Large scale integration; Optical distortion; Read only memory; Read-write memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1984 IEEE International
Conference_Location
San Francisco, CA, USA
Type
conf
DOI
10.1109/ISSCC.1984.1156566
Filename
1156566
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