Title :
A CCD matrix matrix product parallel processor
Author :
Chiang, Ann-Shyn ; Mountain, R. ; Silversmith, D. ; Felton, B.
Author_Institution :
MIT, Lincoln Laboratory, Lexington, MA, USA
Abstract :
The design of a CCD matrix-matrix device operating up to 10MHz clock rates, performing the serial-in parallel-out and Fourier transform functions required in radar doppler filtering, will be reported. The chip contains 32 multipliers and 1024 accumulators.
Keywords :
Charge coupled devices; Clocks; Computer science; Delay lines; Military computing; Parallel processing; Radar; Shift registers; Signal sampling; Very large scale integration;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1984 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1984.1156578
