DocumentCode :
2878833
Title :
Effect of Temperature on the Drop Reliability of Wafer-Level Chip Scale Packaged Electronics Assemblies
Author :
Mattila, T.T. ; James, R.J. ; Nguyen, L. ; Kivilahti, J.K.
Author_Institution :
Helsinki Univ. of Technol., Helsinki
fYear :
2007
fDate :
May 29 2007-June 1 2007
Firstpage :
940
Lastpage :
945
Abstract :
Electronic products experience complex loadings in ordinary daily use where electrical, thermomechanical and mechanical loadings act concurrently. Moreover, portable equipment are exposed to mechanical shocks due to accidental dropping, and therefore their reliability should be studied with tests that simulate the real operational loading conditions as realistically as possible. The reliability of WL-CSP component boards was studied by executing mechanical shock tests at different temperatures according to the JESD22-B111 standard. Heating of the components was produced with the integrated heater elements on silicon chip inside the component package in order to create temperature distributions of the component boards that are comparable to those in real products. The tests were carried out at four different temperatures: 25, 75, 100 and 125degC. The number of drops-to-failure was found to increase significantly with temperature. The failure analyses revealed that the testing temperature did not alter the nucleation site of cracks but their propagation path changed gradually from the intermetallic layers to the solder bumps with increasing temperature. The most likely reason for this change of crack propagation is the fact that the strength of solder and the stiffness of the printed wiring board in the vicinity of the component are reduced markedly with increasing temperature. As a result the level of the highest stresses in the interconnections are decreased and the number of drops-to-failure increased with temperature.
Keywords :
chip scale packaging; reliability; temperature distribution; wafer level packaging; JESD22-B111 standard; WL-CSP component board; chip scale packaged electronics; drop reliability; integrated heater element; mechanical shock; temperature distribution; wafer-level packaging; Assembly; Chip scale packaging; Electric shock; Electronic packaging thermal management; Electronics packaging; Packaging machines; Temperature; Testing; Thermomechanical processes; Wafer scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference, 2007. ECTC '07. Proceedings. 57th
Conference_Location :
Reno, NV
ISSN :
0569-5503
Print_ISBN :
1-4244-0985-3
Electronic_ISBN :
0569-5503
Type :
conf
DOI :
10.1109/ECTC.2007.373909
Filename :
4249995
Link To Document :
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