Title :
A comparison of mixed gate array and custom IC design methods
Author :
Erdelyi, C. ; Bechade, R. ; Concannon, M. ; Hoffman, W.
Author_Institution :
IBM General Tech. Div., Essex Junction, VT, USA
Abstract :
This paper will present a comparison of gate-array, mixed gate-array-custom and full custom implementations of a 32b NMOS microprocessor. Use of 5V and 3.4V on-chip supply voltages and automated gate-array design for parts of the chip has resulted in a speed and power dissipation of 230ns/2.8W, comparable to the full-custom approach (170ns/3W) in half the design time.
Keywords :
Capacitance; Circuit testing; Delay; Design methodology; Driver circuits; Logic circuits; Logic design; Programmable logic arrays; Voltage; Wiring;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1984 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1984.1156631
