Title :
A 1K-gate GaAs gate array
Author :
Ikawa, Y. ; Toyoda, N. ; Mochisuki, M. ; Terada, T. ; Kanazawa, K. ; Hirose, M. ; Mizoguchi, T. ; Hojo, A.
Author_Institution :
Toshiba Res. and Dev. Center, Kawasaki, Japan
Abstract :
A 1050-gate GaAs gate array connected as a 6 × 6b parallel multiplier, which exhibits a multiplication time of 10.6ns and 350mW power dissipation, will be covered.
Keywords :
Delay effects; FETs; Gallium arsenide; Integrated circuit interconnections; Integrated circuit technology; Inverters; Logic arrays; Logic design; Research and development;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1984 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1984.1156640
