DocumentCode
2880149
Title
Flip Chip Package-in-Package (fcPiP): A New 3D Packaging Solution for Mobile Platforms
Author
Pendse, Raj ; Choi, B.S. ; Kim, Baker ; Kim, K.M. ; Kim, Y.C. ; Lee, Kenny ; Park, Susan ; Yang, D.W. ; Zhao, Lily ; Gregorich, Tom ; Holmes, Pat ; Reyes, Ed
Author_Institution
STATSChipPAC Inc., Singapore
fYear
2007
fDate
May 29 2007-June 1 2007
Firstpage
1425
Lastpage
1430
Abstract
A new chip scale package is developed for use in high end cellular handsets and mobile products. The package houses a Baseband device, a pre-packaged Memory device and an Analog device in a 3-high stacked Package-in-Package (PiP) configuration wherein the base band die is attached to a 4-layer 1-2-1 Build-up laminate substrate using flip chip interconnection and the Memory package and Analog die are interconnected to each other as well as to the substrate using wire bonding. The package represents the ultimate in integration, wiring density, high performance and miniaturization. The development of the package was accomplished through close co-working of multidisciplinary teams comprising packaging, design and device architecture. The paper describes the challenges in the development of the individual packaging technologies such as bumped wafer thinning, thin die flip chip attach and underfilling, low loop wire bonding and the integration of those technologies, such as flip chip and wire bonding on the same substrate, underfill and overmolding, and chip-package interactions in the form of parametric shifts in sensitive analog circuitry on the die. The assembly process, reliability and failure modes observed are described in detail including the eventual qualification of the package and its introduction into volume production.
Keywords
cellular radio; chip scale packaging; flip-chip devices; lead bonding; mobile handsets; reliability; analog die; baseband device; build-up laminate substrate; cellular handset; chip scale package; flip chip interconnection; mobile product; package-in-package configuration; prepackaged memory device; reliability; wire bonding; Baseband; Chip scale packaging; Flip chip; Integrated circuit interconnections; Laminates; Paper technology; Telephone sets; Wafer bonding; Wire; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 2007. ECTC '07. Proceedings. 57th
Conference_Location
Reno, NV
ISSN
0569-5503
Print_ISBN
1-4244-0985-3
Electronic_ISBN
0569-5503
Type
conf
DOI
10.1109/ECTC.2007.373982
Filename
4250068
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