Title :
A design of four-quadrant analog multiplier
Author :
Dejhan, Kobchai ; Prommee, Pipat ; Tiamvorratat, Wanlop ; Mitatha, Somsak ; Chaisayun, Ittipong
Author_Institution :
Fac. of Eng., King Mongkut´´s Inst. of Technol., Bangkok, Thailand
Abstract :
The paper proposes a new four-quadrant analog multiplier which consists of a multiplier cell, a mixed signal circuit and three signal subtraction circuits. Its advantages are: the design has single ended inputs; the geometry of all the transistors is equal; its output can be the product of two signal voltage, or the product of a signal current and a signal voltage. Simulation results are demonstrated by PSpice to confirm the operation of the circuit.
Keywords :
MOSFET circuits; analogue multipliers; linear network synthesis; voltage multipliers; PSpice; four-quadrant analog multiplier; mixed signal circuit; multiplier cell; signal subtraction circuits; Asia; Circuit simulation; Filters; Frequency modulation; Geometry; Information technology; MOSFETs; Power supplies; Signal design; Voltage;
Conference_Titel :
Communications and Information Technology, 2004. ISCIT 2004. IEEE International Symposium on
Print_ISBN :
0-7803-8593-4
DOI :
10.1109/ISCIT.2004.1412443
