مرکز منطقه ای اطلاع رساني علوم و فناوري

DocumentCode :

2880816

Title :

A 2.3ns access time 4K ECL RAM

Author :

Tokuyoshi, F. ; Takemura, Hiroshi ; Tashiro, Takayoshi ; Ohi, Shoichi ; Shiraki, H. ; Nakamae, M. ; Kubota, Takahide ; Nakamura, T.

Author_Institution :

NEC Corp., Kanagawa, Japan

Volume :

XXVII

fYear :

1984

fDate :

22-24 Feb. 1984

Firstpage :

220

Lastpage :

221

Abstract :

A poly load 28.0mm²64K×1 SRAM with a 35ns access time has been developed using 1.5μm double TaSi P-well CMOS technology.

Keywords :

Added delay; Boron; Capacitance; Decoding; Delay estimation; Driver circuits; Epitaxial layers; Random access memory; Read-write memory; Resistors;

fLanguage :

English

Publisher :

ieee

Conference_Titel :

Solid-State Circuits Conference. Digest of Technical Papers. 1984 IEEE International

Conference_Location :

San Francisco, CA, USA

Type :

conf

DOI :

10.1109/ISSCC.1984.1156717

Filename :

1156717

Link To Document :