DocumentCode :
2880990
Title :
The Influence of Interconnect Line Patterns using Flat-Surface and Low-Dielectric-Loss Material under High Speed Signal Propagation
Author :
Sugimura, M. ; Imai, H. ; Nakayama, M. ; Kawasaki, M. ; Fujimura, M. ; Oonuki, H. ; Kawashima, O. ; Morimoto, A. ; Teramoto, A. ; Sugawa, S. ; Ohmi, T.
Author_Institution :
Zeon Corp., Kawasaki
fYear :
2007
fDate :
May 29 2007-June 1 2007
Firstpage :
1714
Lastpage :
1719
Abstract :
In this paper, we have developed a low-kappa material and have evaluated its properties. We measured signal propagation delay of test substrate based on new low-kappa material with 50 Omega microstrip line and confirm it showed half of signal propagation loss and 1/4 of signal propagation variation in those of current materials. From this study, we conclude that line formation technology on flat surface, low dielectric and low loss material greatly contribute to high density, high speed and low power consumption of semiconductor package.
Keywords :
chip scale packaging; dielectric losses; dielectric materials; integrated circuit interconnections; microstrip lines; microwave integrated circuits; power consumption; high speed signal propagation delay; interconnect line patterns; line formation technology; low power consumption; low-dielectric-loss material; low-kappa material; microstrip line; resistance 50 ohm; semiconductor package; signal propagation loss; test substrate; Current measurement; Dielectric losses; Dielectric materials; Dielectric substrates; Loss measurement; Materials testing; Microstrip; Propagation delay; Propagation losses; Semiconductor materials;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference, 2007. ECTC '07. Proceedings. 57th
Conference_Location :
Reno, NV
ISSN :
0569-5503
Print_ISBN :
1-4244-0985-3
Electronic_ISBN :
0569-5503
Type :
conf
DOI :
10.1109/ECTC.2007.374026
Filename :
4250112
Link To Document :
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