Title :
A 4.5ns 256K CMOS SRAM with tri-level word line
Author :
Shinohara, Hirofumi ; Anami, K. ; Ichinose, Kento ; Wada, Tomotaka ; Kohno, Yusuke ; Kawai, Yusuke ; Akasaka, Y. ; Kayano, S.
Author_Institution :
Mitsubishi Electric Corporation, Itami, Japan
Abstract :
A report on a CMOS SRAM with a peak current of 45mA obtained through the use of an address transition activated circuit combined with a tri-level word-line circuit will be presented.
Keywords :
Circuits; Decoding; Differential amplifiers; Electronics packaging; Inverters; Mirrors; Random access memory; Read-write memory; Timing; Voltage;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
Conference_Location :
New York, NY, USA
DOI :
10.1109/ISSCC.1985.1156744
